Method and structure for bonding layers in a semiconductor device

ABSTRACT

A structure and a method for providing structural stability at an interface between two poorly adhering layers in a semiconductor device involve providing anchoring channels in one of the poorly adhering layers through which the other poorly adhering layer can be anchored to a third layer. Specifically, the structure and method are applicable to a three-layer stack having a top layer of amorphous silicon, a middle layer of titanium nitride, and a bottom layer of oxide. In order to reduce susceptibility to delamination between the amorphous silicon layer and the titanium nitride layer, the anchoring channels are created in the titanium nitride layer to allow the amorphous silicon to attach to the oxide layer. Because the amorphous silicon layer and the oxide layer exhibit good adhesion between each other, delamination between the amorphous silicon layer and the titanium nitride layer is minimized.

TECHNICAL FIELD

[0001] The invention relates in general to semiconductor devices, andmore particularly to improving adhesion between certain layers that makeup semiconductor devices.

BACKGROUND OF THE INVENTION

[0002] In the fabrication of semiconductor devices, layers, ofdissimilar materials are sequentially formed on top of each other todefine a multi-layer structure. In some instances, two electricallyconducting layers that are formed in direct contact with each otherexhibit poor adhesion. Poor adhesion between layers can have negativeconsequences, such as bubbling, blistering, and/or peeling at theinterface between the two layers. Bubbling, blistering, or peelingdegrades the electrical contact between the layers and in turn causeslow yield and low reliability in fabricated semiconductor devices. Thesusceptibility of a device to the negative effects of poor adhesionbetween layers increases as the area of contact between poorly adheringlayers increases.

[0003] A specific example of two layers that can exhibit poor adhesionto each other is titanium nitride and amorphous silicon. FIG. 1 is adepiction of a layer stack 10 that includes, from the bottom layer tothe top layer, an oxide layer 12, a titanium nitride layer 14, ann-doped amorphous silicon layer 16, an intrinsic amorphous silicon layer18, and a p-doped silicon layer 20. In the exemplary layer stack, thepoor adhesion between the titanium nitride 14 and the n-doped amorphoussilicon 16 tends to cause delamination problems when the linear distanceof contact between the two layers exceeds approximately 200 μm in alldirections.

[0004] One approach to improving adhesion between a titanium layer and asilicon layer in a semiconductor device is disclosed in U.S. Pat. No.5,783,487 entitled “Method of Coupling Titanium to a SemiconductorSubstrate and Semiconductor Device Thereof,” issued to Weeks et al.(hereinafter Weeks). The Weeks approach to improving adhesion between atitanium layer and a silicon layer involves forming an oxide layerbetween the titanium and silicon layers. The oxide layer exhibits goodadhesion with both the titanium and the silicon layers. The Weeksapproach is also utilized to improve adhesion between metal layers onthe back side of a silicon chip. While the approach may work well forits intended purpose, the oxide layer deposited between the titanium andthe silicon layers prevents direct contact between the titanium and thesilicon layers. Depositing an oxide layer between the amorphous silicon16 and titanium nitride 14 layers in the layer stack 10 of FIG. 1negatively affects the electrical characteristics of the layer stack byblocking electrical contact between the amorphous silicon and titaniumnitride layers.

[0005] In view of the adhesion problems that exist between some layersin semiconductor devices, what is needed is a technique that improvesbonding between poorly adhering layers, while maintaining some degree ofelectrical contact between the layers.

SUMMARY OF THE INVENTION

[0006] A method and structure for providing structural stability at aninterface between two poorly adhering layers in a semiconductor deviceinvolve providing anchoring channels in one of the layers through whichthe other layer can be anchored to a third layer. Specifically, thestructure and method are applicable to a three-layer stack having topand middle layers that tend to exhibit delamination when in directcontact with each other over large areas, and a bottom layer that bondswell to both the middle and top layers. In order to reducesusceptibility to delamination between the top and middle layers while,maintaining direct contact between the top layer and the middle layer,anchoring channels are created in the middle layer to allow the toplayer to attach to the bottom layer, in effect tying the top layer downto the bottom layer.

[0007] The structure and method are particularly applicable to layerstacks in semiconductor devices, such as active pixel sensors, thatinclude an oxide layer as the bottom layer, a titanium nitride layer asthe middle layer, and an amorphous silicon layer as the top layer. In apreferred embodiment, the titanium nitride layer is deposited onto theoxide layer, and anchoring channels are created in the titanium nitridelayer in order to expose portions of the oxide layer. The amorphoussilicon layer is then deposited over the titanium nitride layer and intothe anchoring channels in the titanium nitride layer. The anchoringchannels provide direct contact between the amorphous silicon layer andthe oxide layer. Although direct contact is provided between theamorphous silicon layer and the oxide layer, the contact between the twolayers is not electrically conductive. That is, the anchoring channelsare not similar to electrically conducting vias which provide conductivepaths between layers. In order to prevent delamination between thetitanium nitride layer and the amorphous silicon layer, the anchoringchannels are preferably separated by 200 μm or less.

[0008] In another embodiment, the layer of titanium nitride is depositedonto the oxide layer, and portions of the titanium nitride layer areremoved such that a pattern of isolated squares, or islands, of titaniumnitride is created. Thus, in contrast to the first embodiment in whichthe patterned titanium nitride is continuous, in this second embodiment,the patterning of the titanium nitride forms isolated islands of thematerial. Amorphous silicon is then deposited over the titanium nitrideislands and onto the exposed oxide layer, thereby anchoring theamorphous silicon layer to the oxide layer. In order to preventdelamination between the titanium nitride layer and the amorphoussilicon layer, each of the titanium nitride islands preferably has atleast one linear dimension that is less than 500 μm, preferably lessthan 200 μm.

[0009] An advantage of the invention is that yield and reliability ofsemiconductor devices formed with layers of marginal adhesion areimproved because delamination is minimized. Moreover, structuralstability is enhanced without a loss of electrical connectivity betweenthe layers of the marginal adhesion. In addition, the improved adhesioncan be achieved with little extra manufacturing cost.

BRIEF DESCRIPTION OF THE DRAWINGS

[0010]FIG. 1 is a depiction of a layer stack in accordance with theprior art.

[0011]FIG. 2 is a depiction of a preferred layer stack that providesopenings through the middle layer in accordance with the invention.

[0012]FIG. 3 is a depiction of another layer stack that providesopenings through the middle layer in accordance with the invention.

[0013]FIG. 4A is a top view of a layer stack that provides openings inthe middle layer in accordance with the invention.

[0014]FIG. 4B is a sectional view of the layer stack of FIG. 4A showingthe openings in the middle layer in accordance with the invention.

[0015]FIG. 5A is a top view of another layer stack that includesisolated squares of the middle layer in accordance with the invention.

[0016]FIG. 5B is a sectional view of the layer stack of FIG. 5A thatshows the isolated squares of the middle layer in accordance with theinvention.

[0017]FIG. 6 is a process flow for creating a layer stack havingimproved adhesion.

DETAILED DESCRIPTION

[0018]FIG. 2 is a depiction of a preferred layer stack 30 that improvesadhesion between two poorly adhering layers. The layer stack includes,from the bottom layer to the top layer, an oxide layer 32, a titaniumnitride layer 34, an n-doped amorphous silicon layer 36, an intrinsic(not doped) amorphous silicon layer 38, and a p-doped silicon layer 40.As described with reference to FIG. 1, adhesion between the amorphoussilicon layer 36 and the titanium nitride layer 34 is inherently poor,and the resulting poor bonding strength tends to cause problems withyield and reliability, especially when contact between the two layersexceeds approximately 200 μm in all directions. On the other hand, thetitanium nitride layer 34 exhibits good adhesion to the oxide layer 32and amorphous silicon bonds well to oxide.

[0019] In order to improve adhesion between the amorphous silicon layer36 and the titanium nitride layer 34, openings 42 are formed through thetitanium nitride layer to provide anchor points between the two layers.The openings act as anchoring channels, allowing the amorphous siliconto bond directly to the oxide layer 32. Because the amorphous siliconlayer adheres well to the oxide layer, delamination at the interface 46between the amorphous silicon and the titanium nitride is minimized. Inthe prior art layer stack of FIG. 1, the amorphous silicon layer 16 iscompletely separated from the oxide layer 12 by the titanium nitridelayer 14, which leads to the delamination problems, as stated above.Although one example of an anchoring pattern is shown in FIG. 2, thereare many variations of patterns and shapes that can be implemented toprovide direct contact between the amorphous silicon layer and the oxidelayer, while areas of direct interface 48 between the titanium nitrideand the oxide layers are maintained.

[0020] Creating the structure of FIG. 2 involves first depositing alayer of titanium nitride 34 onto the oxide layer 32, with the oxidelayer being formed on a substrate of silicon, for example. In apreferred embodiment, the thickness of the oxide layer ranges fromapproximately 300 Å to 2 μm, and the thickness of the titanium nitridelayer ranges from approximately 100 to 2,000 Å. After deposition,portions of the titanium nitride layer are removed to create theopenings 42, or anchoring channels, in the titanium nitride layer. Theopenings must pass completely through the titanium nitride layer inorder to provide improved adhesion. Preferably, the openings in thetitanium nitride layer are created utilizing known photolithographic andetching techniques.

[0021] After the desired pattern of titanium nitride is removed, theamorphous silicon layer 36 is deposited onto the remaining titaniumnitride layer 34 and into the openings 42 formed within the titaniumnitride layer. The amorphous silicon is deposited at a preferredthickness that ranges from approximately 200 to 30,000 Å. The amorphoussilicon forms a strong bond with the oxide layer 32 at the interface 48points within the openings. Allowing direct contact between theamorphous silicon layer and the oxide layer, and limiting the area ofcontinuous interface 46 between the amorphous silicon and titaniumnitride layers improves adhesion and reduces the problems of bubbling,blistering, peeling, etc. The subsequent layers of the layer stack aredeposited, as needed, to create the desired integrated circuitcomponents, such as transistors, capacitors, resistors, and diodes.

[0022]FIG. 3 is a depiction of another preferred layer stack 50 thatimproves adhesion between two poorly adhering layers. The layer stackincludes, from the bottom layer to the top layer, an oxide layer 52, atitanium nitride layer 54, an n-doped amorphous silicon layer 56, anintrinsic amorphous silicon layer 58, and a p-doped silicon layer 60.The layer stack also includes metal vias 62, or plugs, that form partsof devices such as transistors, capacitors, resistors, etc. Although themetal vias are only shown in FIG. 3, metal vias can also be present inthe layer stack 30 of FIG. 2. In contrast to the embodiment of FIG. 2,the embodiment of FIG. 3 includes a discontinuous amorphous siliconlayer 56 that is in contact with both the titanium nitride layer 54 andthe oxide layer 52. Although the amorphous silicon does not entirelyfill the openings 64 in the titanium nitride layer, there is sufficientsurface contact of the amorphous silicon with the oxide layer thatdelamination between the amorphous silicon and the titanium nitride isprevented. In the embodiment of FIG. 3, the amorphous silicon layer isformed into a discontinuous layer in order to achieve particular devicecharacteristics.

[0023] Creating the structure of FIG. 3 involves first etching via holesinto the oxide layer 52, and then depositing the metal, for exampletungsten, into the via holes. Next, the titanium nitride layer 54 isdeposited on top of the oxide layer and the metal vias 62. Portions ofthe titanium nitride layer are then removed to create a pattern ofopenings 64 that pass completely through the layer. After the desiredpattern of openings is formed in the titanium nitride layer, theamorphous silicon layer 56 is deposited onto the remainder of thetitanium nitride layer and into the openings formed within the titaniumnitride layer. Portions of the amorphous silicon are then removed tocreate the structure of FIG. 3. The subsequent layers (amorphous siliconlayer 58 and p-doped silicon layer 60) are deposited as needed to createthe desired device. As with the structure of FIG. 2, layer depositionand removal is accomplished using known semiconductor fabricationtechniques.

[0024]FIGS. 4A and 4B are top and sectional views of one embodiment of alayer stack that improves adhesion between an amorphous silicon layerand a titanium nitride layer. Referring to FIG. 4A, a layer of titaniumnitride 74 is deposited onto the oxide layer 72, and then a repeatingpattern of openings 70 is created in the titanium nitride layer in orderto expose the oxide layer. The exposed oxide layer allows contact to bemade between the amorphous silicon layer and the oxide layer. Theamorphous silicon layer is then deposited over the titanium nitridelayer and into the openings to create the desired layer stack.

[0025]FIG. 4B is a sectional view of FIG. 4A, taken along line 4B-4B.The openings 70 in the titanium nitride layer 74 provide direct contactbetween the amorphous silicon layer 76 and the oxide layer 72. Theopenings shown in FIGS. 4A and 4B should be sufficiently large(preferably 1-10 μm) to enable good step coverage and provide goodadhesion between the amorphous silicon and the oxide, and the distancebetween openings should be small enough to prevent delamination at theinterface 80 of the amorphous silicon and the titanium nitride layers.In an embodiment, the linear distance between openings in the titaniumnitride layer is less than 500 μm in at least one linear direction,preferably less than 200 μm in at least one linear direction. That is,there should be no point on the titanium nitride layer that is greaterthan 250 μm from an anchoring channel, and preferably no greater than100 μm from at least one anchoring channel.

[0026]FIGS. 5A and 5B are top and sectional views of another embodimentof the layer stack that improves adhesion between the amorphous siliconlayer and the titanium nitride layer. Referring to FIG. 5A, a layer oftitanium nitride 86 is deposited onto the oxide layer 84 and thenportions of the titanium nitride layer are removed such that a repeatingpattern of isolated squares, or islands, of titanium nitride is created.The amorphous silicon is deposited over the titanium nitride islands andonto the exposed oxide layer to create the desired layer stack.

[0027] FIG. SB is a sectional view of FIG. 5A, taken along line 5B-5B.The exposed areas 90 of oxide provide direct contact between theamorphous silicon layer 92 and the oxide layer 84. The titanium nitrideislands of FIG. 5A and 5B should have dimensions that are no larger thanthe minimum dimensions that cause delamination between the amorphoussilicon and the titanium nitride. Preferably, the islands have at leastone linear dimension that is less than 500 μm, more preferably less than200 μm. Although square islands and square openings 78 and 90 are shownin FIGS. 4A and 5A, other shaped openings and/or islands are possible.In addition to the described patterns, other opening patterns, includingnon-repeating patterns can be utilized to provide anchoring between theamorphous silicon layer and the oxide layer.

[0028] In variations of the preferred embodiments, the titanium nitridelayer may also be a titanium layer or a combination titaniumnitride/titanium layer. Other metals, including aluminum, copper, and/ortungsten, are possible. The oxide layer is preferably silicon dioxidealthough other dielectric layers such as silicon nitride are possible.

[0029]FIG. 6 is a process flow diagram of a preferred method forfabricating a layer stack that provides improved adhesion betweenlayers. In a step 100, a first layer is provided. In a step 102, asecond layer is formed on the first layer with the second layerincluding anchoring channels formed completely through the second layer.In a step 104, a third layer is deposited on the second layer and intothe anchoring channels within the second layer, such that the thirdlayer bonds to the first layer, thereby providing good structuralstability in joining the first, second and third layers.

[0030] Although the preferred layer stacks include oxide, titaniumnitride, and amorphous silicon, the approach of providing openings in amiddle layer to improve adhesion between two layers applies equally toother three-layer stacks. Specifically, the approach can be applied tothree-layer stacks in which two layers that exhibit poor adhesion toeach other must be attached to a third layer that exhibits good adhesionto both of the other two layers.

What is claimed is:
 1. A semiconductor device fabrication method forbonding second and third layers formed of materials having weak adhesioncharacteristics with respect to each other, said method comprising thesteps of: providing a first layer, said first layer being electricallynon-conductive, said first layer having properties which providerelatively strong adhesion when in contact with either said second layeror said third layer; forming said second layer on said first layer, saidsecond layer having a first surface in contact with said first layer andhaving a second surface opposite said first surface, said second layerbeing formed to include anchoring channels that pass from said firstsurface of said second layer to said first layer, said second layerbeing electrically conductive; and depositing said third layer on saidsecond surface of said second layer and into said anchoring channelswithin said second layer such that said third layer bonds to said firstlayer, thereby providing structural stability in joining said first,second and third layers.
 2. The method of claim 1 wherein said step ofdepositing includes a step of creating an electrically non-conductivebond between said first layer and said third layer.
 3. The method ofclaim 2 wherein: said step of providing said first layer includes a stepof depositing an oxide layer; said step of forming said second layerincludes a step of depositing a titanium nitride layer; and said step ofdepositing said third layer includes a step of depositing an amorphoussilicon layer.
 4. The method of claim 2 wherein said step of forminganchoring channels within said second layer includes a step of etchinganchoring channels into said second layer, said anchoring channels beingcompletely surrounded by a continuous portion of said second layer. 5.The method of claim 4 wherein no point on said second layer is greaterthan 250 μm from at least one of said anchoring channels.
 6. The methodof claim 5 wherein: said step of providing said first layer includes astep of depositing an oxide layer; said step of forming said secondlayer includes a step of depositing a titanium nitride layer; and saidstep of depositing said third layer includes a step of depositing anamorphous silicon layer.
 7. The method of claim 2 wherein said step offorming anchoring channels within said second layer includes a step ofetching continuous areas within said second layer to create a pluralityof spaced apart second layer islands.
 8. The method of claim 7 whereinno point on said second layer islands is greater than 250 μm from atleast one of said anchoring channels.
 9. The method of claim 8 wherein:said step of providing said first layer includes a step of depositing anoxide layer; said step of forming said second layer includes a step ofdepositing a titanium nitride layer; and said step of depositing saidthird layer includes a step of depositing an amorphous silicon layer.10. A semiconductor device structure for retarding delamination betweenlayers in a three-layer stack comprising: a first layer having first andsecond opposing surfaces; a second layer patterned to reside on a firstportion of said first surface of said first layer, such that said secondlayer is not in contact with a second portion of said first surface ofsaid first layer, said second portion defining anchoring channels; and athird layer on a surface of said second layer that is opposite to saidfirst layer, said third layer residing within said anchoring channelssuch that an electrically non-conducting bond is formed between saidthird layer and said first layer, thereby tying said third layer down tosaid second layer and reducing susceptibility to delamination betweensaid second layer and said third layer.
 11. The semiconductor devicestructure of claim 10 wherein said first layer is an oxide layer, saidsecond layer is a titanium nitride layer, and said third layer is anamorphous silicon layer.
 12. The semiconductor device structure of claim10 wherein said second layer exists on said first surface of said firstlayer in a repeating pattern.
 13. The semiconductor device structure ofclaim 12 wherein said second layer exists as a continuous layer having aplurality of said anchoring channels through said continuous layer. 14.The semiconductor device structure of claim 13 wherein no point on saidsecond layer is more than 250 μm from at least one of said anchoringchannels.
 15. The semiconductor device structure of claim 10 whereinsaid second layer exists as a plurality of non-continuous islands onsaid first surface of said first layer.
 16. The semiconductor devicestructure of claim 15 wherein no point on said non-continuous islands ismore than 250 μm from at least one of said anchoring channels.
 17. Asemiconductor device fabrication method for bonding an amorphous siliconlayer to a titanium nitride layer, said amorphous silicon layer and saidtitanium nitride layer having relatively weak bonding characteristicswith respect to each other, said method comprising the steps of:providing an oxide layer which has relatively strong bondingcharacteristics with respect to amorphous silicon and titanium nitride,said oxide layer being electrically non-conductive; forming saidtitanium nitride layer onto said oxide layer, including forminganchoring channels within said titanium nitride layer, said anchoringchannels exposing portions of said oxide layer for bonding with saidamorphous silicon layer; and depositing said amorphous silicon layeronto said titanium nitride layer and into said anchoring channels inorder to provide structural stability at the interface of said titaniumnitride layer and said amorphous silicon layer, said amorphous siliconlayer forming relatively strong bonds with said exposed portions of saidoxide layer, said relatively strong bonds between sand amorphous siliconlayer and said oxide layer being electrically non-conductive.
 18. Themethod of claim 17 wherein said step of forming said titanium nitridelayer includes a step of limiting the distance between said anchoringchannels to 200 μm or less in at least one linear direction.
 19. Themethod of claim 17 wherein said step of forming anchoring channelswithin said titanium nitride layer includes a step of etching continuousareas within said titanium nitride layer to create a plurality oftitanium nitride layer islands.
 20. The method of claim 19 wherein eachone of said titanium nitride islands is no more than 200 μm in at leastone linear direction.